Comments for Semiconductor Engineering https://semiengineering.com Deep Insights For Chip Engineers Thu, 01 Jun 2017 13:09:00 +0000 hourly 1 https://wordpress.org/?v=4.7.5 Comment on RISC-V Pros And Cons by Ann Steffora Mutschler https://semiengineering.com/risc-v-pros-cons/#comment-1932 Thu, 01 Jun 2017 13:09:00 +0000 https://semiengineering.com/?p=118715#comment-1932 Karl, my guess is that money will talk. When the OEMs decide RISC-V will provide benefit to the bottom line, the ecosystem will quickly emerge. As far as the value, it does seem like there is some momentum, and time will tell.

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Comment on Inside Lithography And Masks by memister https://semiengineering.com/inside-lithography-and-masks/#comment-1931 Thu, 01 Jun 2017 04:38:00 +0000 http://semiengineering.com/?p=35755#comment-1931 Just saw a picture from June 2016 European Mask and Lithography Conference, the pellicle was glowing white-hot under EUV exposure.

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Comment on Sourcing Used Equipment by roy yoon https://semiengineering.com/sourcing-used-equipment/#comment-1930 Wed, 31 May 2017 14:23:00 +0000 https://semiengineering.com/?p=122403#comment-1930 wow!

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Comment on RISC-V Pros And Cons by Karl Stevens https://semiengineering.com/risc-v-pros-cons/#comment-1929 Wed, 31 May 2017 13:32:00 +0000 https://semiengineering.com/?p=118715#comment-1929 Is it worth the time, cost, and effort to establish an ecosystem? Is there real value or wishful thinking?

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Comment on RISC-V Pros And Cons by Karl Stevens https://semiengineering.com/risc-v-pros-cons/#comment-1928 Wed, 31 May 2017 13:29:00 +0000 https://semiengineering.com/?p=118715#comment-1928 Kent, right on. I spent my career in computers/systems so I know how computers work.
The basic difference among RISC ISAs is the load instruction addressing because data has to be loaded first before being used.
Therefore the key is access to memory, then data can be used in computation using the simple add, subtract, multiply, divide, and, or, xor instructions.
RISC came about because compiler writers could not figure out how to use more complex instructions(IBM 801, circa 1980). NOT because it was better, just REDUCED instruction set.
Of course x86 has been used in a few CPUs recently.
ISA is a minor factor, but most talked about.

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Comment on Power/Performance Bits: May 30 by Alan Broadbent https://semiengineering.com/powerperformance-bits-may-30/#comment-1927 Wed, 31 May 2017 12:09:00 +0000 https://semiengineering.com/?p=112147#comment-1927 I dont think the use of piezo as a speaker is overly new I remember some years age (20+) a piece in a magazing possibly ETI where a coated baloon was used as a speaker, a more later event where a thin wire was used to generate electricity (although small) I think Bolton University UK, I have also seen a “piezo tree” which generated power from the wind. while small power can be seen to be generated the trick is to find a use for it, as it is very low ampage. a convertor of this type of power was devised and patented by one of the USA plane engine manufactures boeing or lockhead I also produced a similar type of generator using less components several years ago

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Comment on RISC-V Pros And Cons by Ann Steffora Mutschler https://semiengineering.com/risc-v-pros-cons/#comment-1925 Wed, 31 May 2017 01:57:00 +0000 https://semiengineering.com/?p=118715#comment-1925 I agree that much work needs to be done in order to establish an ecosystem, so we will be watching for development in that area, and then adoption.

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Comment on Manufacturing Bits: May 30 by mike_fusion https://semiengineering.com/manufacturing-bits-may-30/#comment-1924 Tue, 30 May 2017 23:15:00 +0000 https://semiengineering.com/?p=120378#comment-1924 The main reason we do not want to find them soon is because retirement is 35 years away.

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Comment on RISC-V Pros And Cons by Kent Dahlgren https://semiengineering.com/risc-v-pros-cons/#comment-1923 Tue, 30 May 2017 18:27:00 +0000 https://semiengineering.com/?p=118715#comment-1923 The biggest issue in getting traction will be the hardware ecosystem around the core. The AMBA SoC interconnect specs are the defacto standard for this and I expect to see ARM using these as a weapon.

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Comment on Extending EUV Beyond 3nm by memister https://semiengineering.com/extending-euv-to-2nm-and-beyond/#comment-1922 Tue, 30 May 2017 10:11:00 +0000 https://semiengineering.com/?p=93810#comment-1922 Very interesting discussions. Here are a couple more tidbits:

– The position of the mask multilayer surface also determines where the feature is placed, very sensitively.

– Shot noise would be worse for assist features (much smaller than regular features) and optimized sources (only a small fraction of photons from “key” illumination points).

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